All values are current design targets for TILE hardware in active development. Parameters marked "target" have not yet been validated through hardware test. Parameters will be updated as radiation testing, thermal-vacuum testing, and board bring-up progresses. Contact us for the latest datasheet revision under NDA.
Revision: 0.4-DRAFT · Last updated: March 2026
| Parameter | Value | Notes |
|---|---|---|
| Form factor | 1U CubeSat board | PC/104+ footprint compatible |
| Dimensions | 96 × 90 × 16 mm | PCB only, no housing |
| Mass | <500 g | Board + enclosure, target |
| Connector type | PC/104 + dedicated I/O | SpaceWire via dedicated headers |
| Mounting | 4× M3 standoffs | Standard CubeSat stack pattern |
| Parameter | Value | Notes |
|---|---|---|
| Input voltage | 3.3V / 5V | Dual-rail CubeSat EPS compatible |
| Nominal power | 8 W | Active inference workload |
| Peak power | 12 W | Short burst, <5 min duration |
| Idle / standby | 1.5 W | Watchdog active, inference halted |
| Power management | On-board PMIC | Per-subsystem power gating |
| Parameter | Value | Notes |
|---|---|---|
| Processor | ARM Cortex-A class (target) | Final processor selection pending radiation test results |
| ML inference throughput | ~50 GOPS (INT8) | Target, subject to final silicon selection |
| Inference latency | <50 ms | Typical classification workload |
| Model formats | ONNX, TFLite | INT8 and FP16 quantized supported |
| Supported workloads | Classification, detection, fusion | Change detection, anomaly classification, sensor fusion |
| Parameter | Value | Notes |
|---|---|---|
| RAM | 4 GB LPDDR4 | ECC-protected |
| Flash storage | 32 GB eMMC | Model storage + result buffer |
| Bootloader flash | 64 MB NOR | Redundant boot partitions |
| ECC protection | SECDED | Single-bit correct, double-bit detect |
| Scrubbing | Periodic hardware scrub | Configurable interval via flight software |
| Interface | Specification | Notes |
|---|---|---|
| CAN bus | CAN 2.0B, 1 Mbps | Telemetry and commanding |
| SpaceWire | ECSS-E-ST-50-12C, 200 Mbps | High-bandwidth sensor data input |
| UART | 2× UART, 921600 baud | Debug + secondary commanding |
| SPI | SPI 0/1, up to 50 MHz | Peripheral sensors |
| I²C | 2× I²C, 400 kHz fast mode | Housekeeping sensors |
| GPIO | 16× GPIO | Configurable interrupt sources |
| Parameter | Value | Notes |
|---|---|---|
| Operating temperature | −40°C to +85°C | Junction temperature qualified range |
| TID tolerance | 30 krad(Si) | Design target, ECSS-E-ST-10-12 environment |
| SEL protection | Hardware current limiting | Automatic power cycle on SEL event |
| SEU protection | ECC memory, TMR (critical logic) | Triple modular redundancy on flight-critical state machines |
| Displacement damage | 1×10¹⁰ n/cm² | NIEL design target, LEO 5yr mission |
| Vacuum compatibility | Yes | No out-gassing materials. Conformal coating planned. |
| Item | Status | Notes |
|---|---|---|
| Flight software API | In development | C/C++ API for inference trigger + result access |
| RTOS support | FreeRTOS (target) | Linux fallback under evaluation |
| Model compiler | TILE Toolchain (pre-release) | ONNX/TFLite → TILE binary format |
| Simulator | Available to evaluation partners | PC-based hardware-in-loop simulation |
| Ground uplink updates | Roadmap | Over-the-air model update not yet available |
The complete TILE engineering datasheet includes SpaceWire and CAN interface timing diagrams, power sequencing and PMIC configuration notes, thermal design guidance for CubeSat stack integration, and available radiation test data. Provided to qualified satellite operators under NDA.